Processors have an execution pipeline, so a single command like mov has some number of actions the CPU takes to execute it. CPU designers already have some magic that allows them to execute these out of order as well as other stuff like pre calculating what they think the next command will probably be.
It’s been a decade since my cpu class so I am butchering that explanation, but I think that is what they are proposing messing with
Its done through multiple algorithms, but the general idea is to schedule calculations as soon as possible, accounting for data hazards to make sure everything is still equivalent to non out of order execution. Individual circuits can execute different things at the same time. Special hardware is needed to make the algorithms work.
There’s also branch prediction which is the same thing kind of except the CPU needs a way to ensure if the prediction was actually correct.
Hmm, so sounds like they’re moving the kernel scheduler down to a hardware layer? Basically just better smp?
Processors have an execution pipeline, so a single command like mov has some number of actions the CPU takes to execute it. CPU designers already have some magic that allows them to execute these out of order as well as other stuff like pre calculating what they think the next command will probably be.
It’s been a decade since my cpu class so I am butchering that explanation, but I think that is what they are proposing messing with
That’s accurate.
Its done through multiple algorithms, but the general idea is to schedule calculations as soon as possible, accounting for data hazards to make sure everything is still equivalent to non out of order execution. Individual circuits can execute different things at the same time. Special hardware is needed to make the algorithms work.
There’s also branch prediction which is the same thing kind of except the CPU needs a way to ensure if the prediction was actually correct.